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may, 2002 rev. 3 1 publication order number: ncp552/d ncp552, ncp553 80 ma cmos low iq nocap voltage regulator this series of fixed output nocap linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. this series features an ultralow quiescent current of 2.8 a. each device contains a voltage reference unit, an error amplifier, a pmos power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. the ncp552 series provides an enable pin for on/off control. these voltage regulators have been designed to be used with low cost ceramic capacitors. the devices have the ability to operate without an output capacitor. the devices are housed in the microminiature sc82ab surface mount package. standard voltage versions are 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.3, and 5.0 v. other voltages are available in 100 mv steps. features ? low quiescent current of 2.8 a typical ? low output voltage option ? output voltage accuracy of 2.0% ? industrial temperature range of 40 c to 85 c ? ncp552 provides an enable pin typical applications ? battery powered consumer products ? handheld instruments ? camcorders and cameras figure 1. ncp552 typical application diagram this device contains 32 active transistors output c2 off on + input gnd enable v in v out + c1 figure 2. ncp553 typical application diagram output c2 + input gnd n/c v in v out + c1 this device contains 32 active transistors see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information sc82ab (sc704) sq suffix case 419c 1 4 pin connections & marking diagrams gnd (ncp552 top view) 1 2 4 3 v in enable v out xxxm xxx = device code m = date code gnd 1 2 4 3 v in n/c v out xxxm (ncp553 top view) http://onsemi.com
ncp552, ncp553 http://onsemi.com 2 pin function description ncp552 ncp553 pin name description 1 1 gnd power supply ground. 2 2 vin positive power supply input voltage. 3 3 vout regulated output voltage. 4 enable this input is used to place the device into lowpower standby. when this input is pulled low, the device is disabled. if this function is not used, enable should be connected to vin. 4 n/c no internal connection. maximum ratings rating symbol value unit input voltage v in 12 v enable voltage (ncp552 only) enable 0.3 to v in +0.3 v output voltage v out 0.3 to v in +0.3 v power dissipation and thermal characteristics power dissipation thermal resistance, junction to ambient p d r q ja internally limited 400 w c/w operating junction temperature t j +125 c operating ambient temperature t a 40 to +85 c storage temperature t stg 55 to +150 c 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v per milstd883, method 3015 machine model method 200 v 2. latch up capability (85 c) 200 ma dc with trigger voltage.
ncp552, ncp553 http://onsemi.com 3 electrical characteristics (v in = v out(nom.) + 1.0 v, v enable = v in , c in = 1.0 f, c out = 1.0 f, t j = 25 c, unless otherwise noted.) characteristic symbol min typ max unit output voltage (t a = 25 c, i out = 10 ma) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 3.0 v 3.3 v 5.0 v v out 1.455 1.746 2.425 2.646 2.744 2.94 3.234 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.3 5.0 1.545 1.854 2.575 2.754 2.856 3.06 3.366 5.100 v output voltage (t a = 40 c to 85 c, i out = 10 ma) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 3.0 v 3.3 v 5.0 v v out 1.455 1.746 2.425 2.619 2.716 2.910 3.201 4.900 1.5 1.8 2.5 2.7 2.8 3.0 3.3 5.0 1.545 1.854 2.575 2.781 2.884 3.09 3.399 5.100 v line regulation (v in = v out + 1.0 v to 12 v, i out = 10 ma) reg line 2.0 4.5 mv/v load regulation (i out = 1.0 ma to 80 ma, v in = v out + 2.0 v) reg load 0.3 0.8 mv/ma output current (v out = (v out at i out = 80 ma) 3.0%) 1.5 v3.9 v (v in = v out(nom.) + 2.0 v) 4.0 v5.0 v (v in = 6.0 v) i o(nom.) 80 80 180 180 ma dropout voltage (t a = 40 c to 85 c, i out = 80 ma, measured at v out 3.0%) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 3.0 v 3.3 v 5.0 v v in v out 1300 1100 800 750 730 680 650 470 1800 1600 1400 1200 1200 1000 1000 800 mv quiescent current (enable input = 0 v) (enable input = v in , i out = 1.0 ma to i o(nom.) , v in = v out +2.0 v) i q 0.1 2.8 1.0 6.0 a output short circuit current (v out = 0 v) 1.5 v3.9 v (v in = v out(nom.) + 2.0 v) 4.0 v5.0 v (v in = 6.0 v) i out(max) 100 100 300 300 450 450 ma output voltage noise (f = 20 hz to 100 khz, i out = 10 ma) (c out = 1.0 f) v n 90 vrms enable input threshold voltage (ncp552 only) (voltage increasing, output turns on, logic high) (voltage decreasing, output turns off, logic low) v th(en) 1.3 0.3 v output voltage temperature coefficient t c 100 ppm/ c 3. maximum package power dissipation limits must be observed. pd t j(max) t a r ja 4. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
ncp552, ncp553 http://onsemi.com 4 definitions load regulation the change in output voltage for a change in output current at a constant temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 3.0% below its nominal. the junction temperature, load current, and minimum input supply requirements affect the dropout level. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specifications. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. line transient response typical over and undershoot response when input voltage is excited with a given slope. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 160 c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125 c. depending on the ambient power dissipation and thus the maximum available output current.
ncp552, ncp553 http://onsemi.com 5 5 1.5 1 0.5 time ( s) 6 2 4.5 3 2.5 3.5 output voltage deviation (mv) v in , input voltage (v) i q , quiescent current ( a) i q , quiescent current ( a) 60 2.75 0 40 1.75 3.25 3 20 100 60 2 2.5 2.25 20 40 80 temperature ( c) 0.5 0 50 0.5 25 0 25 v in v out , dropout voltage (volts) 0 figure 3. dropout voltage versus temperature figure 4. output voltage versus temperature figure 5. quiescent current versus temperature figure 6. quiescent current versus input voltage figure 7. output noise density frequency (hz) figure 8. line transient response output noise ( v/ hz ) 1 10 100 temperature ( c) 0.6 50 125 75 0.1 0.4 0.3 v out(nom.) = 3.0 v 60 3.02 0 40 v out , output voltage (volts) 3 3.03 temperature ( c) 3.025 20 100 60 3.005 3.015 3.01 v out(nom.) = 3.3 v i out = 5 ma i out = 0 ma v in = 4 v 0 2 6 4 2 0 3 v in , input voltage (volts) 2.5 812 10 0.5 1.5 1 v out(nom.) = 3 v i out = 0 ma 4.5 1 1.5 2 2.5 3 3.5 4 1000000 100 0 0 100 200 4 i out = 1 ma c out = 1 f 100 0.2 0.7 0.8 0.9 80 ma 40 ma 20 40 80 v in = 12 v v in = 4 v 3.5 4 1000 10000 100000 10 ma 50 ma 4
ncp552, ncp553 http://onsemi.com 6 400 100 0 50 50 200 0 400 10 time (ms) figure 9. load transient response figure 10. load transient response 0 time (ms) 100 150 0 600 20 50 0 50 30 40 output voltage deviation (mv) i out , output current (v) output voltage deviation (mv) i out , output current (ma) 0.5 1 2 1.5 v in = 4 v c out = 10 f v in = 4 v c out = 10 f 0 2 3 1 1.5 0 3.5 5 100 0 figure 11. turnon response (ncp552 only) figure 12. output voltage versus input voltage 0 time ( s) 200 700 0.5 400 300 600 v out , output voltage (volts) output voltage (v) enable voltage (v) 24 12 6 c in = 1 f c out = 1 f t a = 25 c i out = 10 ma c in = 1 f c out = 0.1 f v in = 4 v 0 500 v in , input voltage (volts) 2.5 8 200 200 10 0 1 2 3
ncp552, ncp553 http://onsemi.com 7 applications information a typical application circuit for the ncp552 series and ncp553 series is shown in figure 1 and figure 2, front page. input decoupling (c1) a 1.0 f capacitor either ceramic or tantalum is recommended and should be connected close to the package. higher values and lower esr will improve the overall line transient response. if large line or load transients are not expected, then it is possible to operate the regulator without the use of a capacitor. tdk capacitor: c2012x5r1c105k, or c1608x5r1a105k output decoupling (c2) the ncp552 and ncp553 are very stable regulators and do not require any specific equivalent series resistance (esr) or a minimum output current. if load transients are not to be expected, then it is possible for the regulator to operate with no output capacitor. otherwise, capacitors exhibiting esrs ranging from a few m w up to 10 w can thus safely be used. the minimum decoupling value is 0.1 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. larger values improve noise rejection and load regulation transient response. tdk capacitor: c2012x5r1c105k, c1608x5r1a105k, or c3216x7r1c105k enable operation (ncp552 only) the enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low. these limits of threshold are covered in the electrical specification section of this data sheet. if the enable is not used then the pin should be connected to v in . hints please be sure the vin and gnd lines are suf ficiently wide. when the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. thermal as power across the ncp552 and ncp553 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material and also the ambient temperature effect the rate of temperature rise for the part. this is stating that when the devices have good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. the maximum dissipation the package can handle is given by: pd t j(max) t a r ja if junction temperature is not allowed above the maximum 125 c, then the ncp552 and ncp553 can dissipate up to 250 mw @ 25 c. the power dissipated by the ncp552 and ncp553 can be calculated from the following equation: p tot [ v in *i gnd (i out ) ] [ v in v out ] *i out or v inmax p tot v out * i out i gnd i out if an 80 ma output current is needed then the ground current from the data sheet is 2.8 a. for an ncp552 or ncp553 (3.0 v), the maximum input voltage will then be 6.12 v.
ncp552, ncp553 http://onsemi.com 8 information for using the sc82ab surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. mm 1.90 0.80 1.30 0.80 sc82ab (sc704) 0.60 0.60 0.60 0.80
ncp552, ncp553 http://onsemi.com 9 ordering information device nominal output voltage marking package shipping ncp552sq15t1 1.5 law ncp552sq18t1 1.8 lax ncp552sq25t1 2.5 lay ncp552sq27t1 2.7 laz sc82ab 3000 units/ ncp552sq28t1 2.8 lba sc82 ab (sc704) 3000 units/ 8 tape & reel ncp552sq30t1 3.0 lbb (sc70 4) 8 ta e & reel ncp552sq33t1 3.3 lbc ncp552sq50t1 5.0 lbd ncp553sq15t1 1.5 lbe ncp553sq18t1 1.8 lbf ncp553sq25t1 2.5 lbg ncp553sq27t1 2.7 lbh sc82ab 3000 units/ ncp553sq28t1 2.8 lbi sc82 ab (sc704) 3000 units/ 8 tape & reel ncp553sq30t1 3.0 lbj (sc70 4) 8 ta e & reel ncp553sq33t1 3.3 lbk ncp553sq50t1 5.0 lbl additional voltages in 100 mv steps are available upon request by contacting your on semiconductor representative.
ncp552, ncp553 http://onsemi.com 10 package dimensions sc82ab (sc704) sq suffix case 419c01 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 12 3 a g s n j k 4 d 3 pl b f l c h 0.05 (0.002) dim min max min max inches millimeters a 1.8 2.2 0.071 0.087 b 1.15 1.45 0.045 0.057 c 0.8 1.1 0.031 0.043 d 0.2 0.4 0.008 0.016 f 0.3 0.5 0.012 0.020 g 1.1 1.5 0.043 0.059 h 0.0 0.1 0.000 0.004 j 0.10 0.26 0.004 0.010 k 0.1 --- 0.004 --- l 0.05 bsc 0.002 bsc n 0.7 ref 0.028 ref s 1.8 2.4 0.07 0.09
ncp552, ncp553 http://onsemi.com 11 notes
ncp552, ncp553 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. npc552/d nocap is a trademark of semiconductor components industries, llc. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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